Course Outcomes
CO1: Apply the knowledge of digital representation of information and Boolean algebra to deduce optimal digital circuits.
CO2: Design and implement combinational logic circuits, sequential logic circuits and finite state machines.
CO3: Design and implement digital circuits on FPGA using hardware description language (HDL).
CO4: Outline the performance of logic families with Respect to different parameters.
Syllabus
Module I
Introduction to digital circuits: Review of number systems representation, conversions, Arithmetic of Binary number systems, Signed and unsigned numbers, BCD.
Boolean algebra: Theorems, sum of product and product of sum – simplification, canonical forms- min term and max term, Simplification of Boolean expressions – Karnaugh map (upto 4 variables), Implementation of Boolean expressions using universal gates.
Module II
Combinational logic circuits- Half adder and Full adders, Subtractors, BCD adder, Ripple carry and carry look ahead adders, Decoders, Encoders, Code converters, Comparators, Parity generator, Multiplexers, De-multiplexers, Implementation of Boolean algebra using MUX.
Introduction to Verilog HDL – Basic language elements, Basic implementation of logic gates and combinational circuits.
Module III
Sequential Circuits: SR Latch, Flip flops – SR, JK, Master-Slave JK, D and T Flip flops. Conversion of Flip flops, Excitation table and characteristic equation. Shift registers-SIPO, SISO, PISO, PIPO and Universal shift registers. Ring and Johnsons counters. Design of Asynchronous, Synchronous and Mod N counters.
Finite state machines – Mealy and Moore models, State graphs, State assignment, State table, State reduction.
Module IV
Logic Families: -Electrical characteristics of logic gates (Noise margin, Fanin, Fan-out, Propagation delay, Transition time, Power -delay product) -TTL, ECL, CMOS.
Circuit description and working of TTL and CMOS inverter, CMOS NAND and CMOS NOR gates.
